Course Name:   

System Development and Programming with the ADSP-TS20x (TigerSharc) Family

Course Objectives:

The main course objective is to understand the architecture of the ADSP-TS20x Family of DSPs sufficiently to enable DSP system designers to resolve hardware/software issues with their applications. Additional goals include gaining a thorough understanding of both assembly language programming and code development (including 'C' programming issues) with the latest software tools

Course Description:

This is a practical course with 'hands on' training using the latest VisualDSP++ software development tools. First the core elements of the processor, which includes the Computational Units, the Integer ALUs, and the Program Sequencer, are examined in detail along with the relevant assembly code instructions. A number of simulator labs help in understanding operation of the individual elements. Memory configuration (both internal and external) is discussed next. Advanced instructions are presented with a follow on lab on code optimization. The I/O peripherals, which include the Link Ports and External Port, are discussed in detail along with DMA operation between these peripherals and internal memory. This section also deals with system booting and other features including timers and SDRAM controller. Finally, hardware development tools, such as evaluation boards and ICE's are introduced. Throughout the course, the various aspects of the software development process using the latest tools are discussed including setting up and building projects, assembly language programming, code debugging, simulation, tool support for code overlays and shared memory, and 'C' programming support. A detailed course outline can be found at WS_TS20X-OUT.PDF.

Who Should Attend:

Code Developers needing to know how to get the highest performance from their algorithms, System Designers needing to make informed decisions on design tradeoffs, and Hardware Designers needing to develop external interfaces

Prerequisite:

Previous embedded microprocessor experience (hardware and/or software) would be an asset.

Duration:

3.5 days

Course Fee:

Register early and save 6% on the workshop fee:
$1500 USD (North America) / $1850 USD (Europe) - If paid on or before the Run/Cancel Decision Date
$1595 USD (North America) / $1975 USD (Europe) - If paid after the Run/Cancel Decision Date

Schedule:

This workshop can also be provided at your facilities.  Please send your request to info@kaztek.com.

Workshop participants can get 50% off the regular price on their choice of any 3 Analog Devices hardware or software development tools.
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